Network on Chip Optimization Based on Surrogate Model Assisted Evolutionary Algorithms

Wu, M, Karkar, A, Liu, Bo, Yakolev, A, Gielen, G and Grout, Vic (2014) Network on Chip Optimization Based on Surrogate Model Assisted Evolutionary Algorithms. In: IEEE World Congress on Computational Intelligence, 6-11 July 2014, Beijing.

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Abstract

Network-on-Chip (NoC) design is attracting more and more attention nowadays, but there is a lack of design optimization method due to the computationally very expensive simulations of NoC. To address this problem, an algorithm, called NoC design optimization based on Gaussian process model assisted differential evolution (NDPAD), is presented. Using the surrogate model-aware evolutionary search (SMAS) framework with the tournament selection based constraint handling method, NDPAD can obtain satisfactory solutions using a limited number of expensive simulations. The evolutionary search strategies and training data selection methods are then investigated to handle integer design parameters in NoC design optimization problems. Comparison shows that comparable or even better design solutions can be obtained compared to standard EAs, and much less computation effort is needed.

Item Type: Conference or Workshop Item (Paper)
Additional Information: © 2014 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.
Keywords: Gaussian processes, evolutionary computation, logic design, network-on-chip, search problems
Divisions: Applied Science, Computing and Engineering
Depositing User: Mr Stewart Milne
Date Deposited: 11 Aug 2015 15:22
Last Modified: 26 Apr 2018 14:39
URI: https://glyndwr.repository.guildhe.ac.uk/id/eprint/8332

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